What is the application of master slave flip flop?

A master slave flip-flop's output is edge triggered. Data is stored in the master when clock is in one condition and transferred to the slave when the clock changed (edge) from that state. The slave provides the output.
Thus providing a precise stable output. 

Difference between register and flip flop?

A flip-flip is a storage element that can store just 1-bit .. so to store more bits we can combine a bunch of flip-flops to form a register.. so actually a flip is a basic unit of register.

What is the difference between a flip-flop and a latch?

What is the difference between a flip-flop and a latch?

flip flop:
-> it work's on the basis of clock pulses.
-> it is a edge trigerred , it mean that the output and the next state input changes when there is a change in clock pulse whether it may a +ve or -ve clock pulse.
latch;
-> it is based on enable function input
-> it is a level trigerred , it mean that the output of present state and input of the next state depends on the level that is binary input 1 or 0.

Both the flip-flop and latch are Sequential circuits....

• Flip flops are edge-triggered devices whereas latches are level triggered devices.
• latch does not have clock signal whereas flip flop does.
• Flip flop has two values while latch has only one value.

A: A flip-flop can be set reset and pass date with a clock a latch is a two state switch of or on
A flip flop will follow a clock a latch will remain status quo until it is unlatch. basically one does not use flip flop for latches and viceversa. both can be flip and latched by signals.

The JK Flip Flop

The JK Flip Flop

From the previous tutorial we now know that the basic gated SR NAND flip flop suffers from two basic problems: number one, the S = 0 and R = 0 condition (S = R = 0) must always be avoided, and number two, if S or R change state while the enable input is high the correct latching action may not occur. Then to overcome these two fundamental design problems with the SR flip-flop design, the JK flip Flop was developed.

This simple JK flip Flop is the most widely used of all the flip-flop designs and is considered to be a universal flip-flop circuit. The sequential operation of the JK flip flop is exactly the same as for the previous SR flip-flop with the same “Set” and “Reset” inputs. The difference this time is that the “JK flip flop” has no invalid or forbidden input states of the SR Latch even when S and R are both at logic “1”.
The JK flip flop is basically a gated SR Flip-flop with the addition of a clock input circuitry that prevents the illegal or invalid output condition that can occur when both inputs S and R are equal to logic level “1”. Due to this additional clocked input, a JK flip-flop has four possible input combinations, “logic 1″, “logic 0″, “no change” and “toggle”. The symbol for a JK flip flop is similar to that of an SR Bistable Latch as seen in the previous tutorial except for the addition of a clock input.

The Basic JK Flip-flop

 

Both the S and the R inputs of the previous SR bistable have now been replaced by two inputs called the J and K inputs, respectively after its inventor Jack Kilby. Then this equates to: J = S and K = R.
The two 2-input AND gates of the gated SR bistable have now been replaced by two 3-input NAND gates with the third input of each gate connected to the outputs at Q and Q. This cross coupling of the SR flip-flop allows the previously invalid condition of S = “1” and R = “1” state to be used to produce a “toggle action” as the two inputs are now interlocked.
If the circuit is now “SET” the J input is inhibited by the “0” status of Q through the lower NAND gate. If the circuit is “RESET” the K input is inhibited by the “0” status of Q through the upper NAND gate. As Q and Q are always different we can use them to control the input. When both inputs J and K are equal to logic “1”, the JK flip flop toggles as shown in the following truth table.

The Truth Table for the JK Function

same as for the SR Latch	Input		Output		Description
	J	K	Q	Q
	0	0	0	0	Memory no change
	0	0	0	1
	0	1	1	0	Reset Q » 0
	0	1	0	1
	1	0	0	1	Set Q » 1
	1	0	1	0
toggle action	1	1	0	1	Toggle
	1	1	1	0

Then the JK flip-flop is basically an SR flip flop with feedback which enables only one of its two input terminals, either SET or RESET to be active at any one time thereby eliminating the invalid condition seen previously in the SR flip flop circuit. Also when both the J and the K inputs are at logic level “1” at the same time, and the clock input is pulsed either “HIGH”, the circuit will “toggle” from its SET state to a RESET state, or visa-versa. This results in the JK flip flop acting more like a T-type toggle flip-flop when both terminals are “HIGH”.
Although this circuit is an improvement on the clocked SR flip-flop it still suffers from timing problems called “race” if the output Q changes state before the timing pulse of the clock input has time to go “OFF”. To avoid this the timing pulse period ( T ) must be kept as short as possible (high frequency). As this is sometimes not possible with modern TTL IC’s the much improved Master-Slave JK Flip-flop was developed.
The master-slave flip-flop eliminates all the timing problems by using two SR flip-flops connected together in a series configuration. One flip-flop acts as the “Master” circuit, which triggers on the leading edge of the clock pulse while the other acts as the “Slave” circuit, which triggers on the falling edge of the clock pulse. This results in the two sections, the master section and the slave section being enabled during opposite half-cycles of the clock signal.
The TTL 74LS73 is a Dual JK flip-flop IC, which contains two individual JK type bistable’s within a single chip enabling single or master-slave toggle flip-flops to be made. Other JK flip flop IC’s include the 74LS107 Dual JK flip-flop with clear, the 74LS109 Dual positive-edge triggered JK flip flop and the 74LS112 Dual negative-edge triggered flip-flop with both preset and clear inputs.

Dual JK Flip-flop 74LS73

Other Popular JK Flip-flop ICs

Device Number	Subfamily	Device Description
74LS73	LS TTL	Dual JK-type Flip Flops with Clear
74LS76	LS TTL	Dual JK-type Flip Flops with Preset and Clear
74LS107	LS TTL	Dual JK-type Flip Flops with Clear
4027B	Standard CMOS	Dual JK-type Flip Flop

The Master-Slave JK Flip-flop

The Master-Slave Flip-Flop is basically two gated SR flip-flops connected together in a series configuration with the slave having an inverted clock pulse. The outputs from Q and Q from the “Slave” flip-flop are fed back to the inputs of the “Master” with the outputs of the “Master” flip flop being connected to the two inputs of the “Slave” flip flop. This feedback configuration from the slave’s output to the master’s input gives the characteristic toggle of the JK flip flop as shown below.

The Master-Slave JK Flip Flop

 

The input signals J and K are connected to the gated “master” SR flip flop which “locks” the input condition while the clock (Clk) input is “HIGH” at logic level “1”. As the clock input of the “slave” flip flop is the inverse (complement) of the “master” clock input, the “slave” SR flip flop does not toggle. The outputs from the “master” flip flop are only “seen” by the gated “slave” flip flop when the clock input goes “LOW” to logic level “0”.
When the clock is “LOW”, the outputs from the “master” flip flop are latched and any additional changes to its inputs are ignored. The gated “slave” flip flop now responds to the state of its inputs passed over by the “master” section.
Then on the “Low-to-High” transition of the clock pulse the inputs of the “master” flip flop are fed through to the gated inputs of the “slave” flip flop and on the “High-to-Low” transition the same inputs are reflected on the output of the “slave” making this type of flip flop edge or pulse-triggered.
Then, the circuit accepts input data when the clock signal is “HIGH”, and passes the data to the output on the falling-edge of the clock signal. In other words, the Master-Slave JK Flip flop is a “Synchronous” device as it only passes data with the timing of the clock signal.
In the next tutorial about Sequential Logic Circuits, we will look at Multivibrators that are used as waveform generators to produce the clock signals to switch sequential circuits.

Difference Between Fan In and Fan Out in Digital Electronics

Fan In and Fan Out are characteristics of Digital ICs. Digital ICs are complete functioning logic networks. Typically, a Digital IC requires only a power supply, I/P (input) and O/P (output). Here are the definitions of Fan In and Fan Out.
Fan In: The fan-in defined as the maximum number of inputs that a logic gate can accept. If number of input exceeds, the output will be undefined or incorrect. It is specified by manufacturer and is provided in the data sheet.
Fan Out: The fan-out is defined as the maximum number of inputs (load) that can be connected to the output of a gate without degrading the normal operation. Fan Out is calculated from the amount of current available in the output of a gate and the amount of current needed in each input of the connecting gate. It is specified by manufacturer and is provided in the data sheet. Exceeding the specified maximum load may cause a malfunction because the circuit will not be able supply the demanded power.
The difference between these two characteristics of a digital IC is significant from the definitions above.
Hope you find the information presented here useful. Feel free to leave your footprints in the comments section below for any further queries, feedback or suggestions.

The Difference Between a Curriculum Vitae (CV) and a Resume

The primary differences between a resume and a curriculum vitae (CV) are the length, what is included, and what each is used for. While both are used in job applications, a resume and a CV are not always interchangeable.

A resume is a one or two page summary of your skills, experience, and education. While a resume is brief and concise -- no more than a page or two -- a curriculum vitae is longer (at least two pages) and provides a more detailed synopsis.

A curriculum vitae includes a summary of your educational and academic backgrounds as well as teaching and research experience, publications, presentations, awards, honors, affiliations, and other details. In Europe, the Middle East, Africa, or Asia, employers may expect to receive a curriculum vitae.
In the United States, a curriculum vitae is used primarily when applying for academic, education, scientific, or research positions. It is also applicable when applying for fellowships or grants.

 

Analog vs. Digital

http://www.diffen.com

Analog and digital signals are used to transmit information, usually through electric signals. In both these technologies, the information, such as any audio or video, is transformed into electric signals. The difference between analog and digital technologies is that in analog technology, information is translated into electric pulses of varying amplitude. In digital technology, translation of information is into binary format (zero or one) where each bit is representative of two distinct amplitudes.

Contents: Analog vs Digital

1 Definitions of Analog vs. Digital signals 2 Properties of Digital vs Analog signals 3 Differences in Usage in Equipment 4 Comparison of Analog vs Digital Quality 5 Differences in Applications 6 References

Definitions of Analog vs. Digital signals

An Analog signal is any continuous signal for which the time varying feature (variable) of the signal is a representation of some other time varying quantity, i.e., analogous to another time varying signal. It differs from a digital signal in terms of small fluctuations in the signal which are meaningful.
A digital signal uses discrete (discontinuous) values. By contrast, non-digital (or analog) systems use a continuous range of values to represent information. Although digital representations are discrete, the information represented can be either discrete, such as numbers or letters, or continuous, such as sounds, images, and other measurements of continuous systems.

Properties of Digital vs Analog signals

Digital information has certain properties that distinguish it from analog communication methods. These include

• Synchronization – digital communication uses specific synchronization sequences for determining synchronization.
• Language – digital communications requires a language which should be possessed by both sender and receiver and should specify meaning of symbol sequences.
• Errors – disturbances in analog communication causes errors in actual intended communication but disturbances in digital communication does not cause errors enabling error free communication. Errors should be able to substitute, insert or delete symbols to be expressed.
• Copying – analog communication copies are quality wise not as good as their originals while due to error free digital communication, copies can be made indefinitely.
• Granularity – for a continuously variable analog value to be represented in digital form there occur quantization error which is difference in actual analog value and digital representation and this property of digital communication is known as granularity.

Differences in Usage in Equipment

Many devices come with built in translation facilities from analog to digital. Microphones and speaker are perfect examples of analog devices. Analog technology is cheaper but there is a limitation of size of data that can be transmitted at a given time.
Digital technology has revolutionized the way most of the equipments work. Data is converted into binary code and then reassembled back into original form at reception point. Since these can be easily manipulated, it offers a wider range of options. Digital equipment is more expensive than analog equipment.

Comparison of Analog vs Digital Quality

Digital devices translate and reassemble data and in the process are more prone to loss of quality as compared to analog devices. Computer advancement has enabled use of error detection and error correction techniques to remove disturbances artificially from digital signals and improve quality.

Differences in Applications

Digital technology has been most efficient in cellular phone industry. Analog phones have become redundant even though sound clarity and quality was good.
Analog technology comprises of natural signals like human speech. With digital technology this human speech can be saved and stored in a computer. Thus digital technology opens up the horizon for endless possible uses.

Comparison chart

	Analog	Digital
Signal	Analog signal is a continuous signal which represents physical measurements.	Digital signals are discrete time signals generated by digital modulation.
Waves	Denoted by sine waves	Denoted by square waves
Representation	Uses continuous range of values to represent information	Uses discrete or discontinuous values to represent information
Example	Human voice in air, analog electronic devices.	Computers, CDs, DVDs, and other digital electronic devices.
Technology	Analog technology records waveforms as they are.	Samples analog waveforms into a limited set of numbers and records them.
Data transmissions	Subjected to deterioration by noise during transmission and write/read cycle.	Can be noise-immune without deterioration during transmission and write/read cycle.
Response to Noise	More likely to get affected reducing accuracy	Less affected since noise response are analog in nature
Flexibility	Analog hardware is not flexible.	Digital hardware is flexible in implementation.
Uses	Can be used in analog devices only. Best suited for audio and video transmission.	Best suited for Computing and digital electronics.
Applications	Thermometer	PCs, PDAs
Bandwidth	Analog signal processing can be done in real time and consumes less bandwidth.	There is no guarantee that digital signal processing can be done in real time and consumes more bandwidth to carry out the same information.
Memory	Stored in the form of wave signal	Stored in the form of binary bit
Power	Analog instrument draws large power	Digital instrument drawS only negligible power
Cost	Low cost and portable	Cost is high and not easily portable
Impedance	Low	High order of 100 megaohm
Errors	Analog instruments usually have a scale which is cramped at lower end and give considerable observational errors.	Digital instruments are free from observational errors like parallax and approximation

VPP VEE VSS VCC VDD

VPP: programming/erase voltage.
VEE: negative supply; FET's source (S)
VSS: or power cathode
VCC: power supply voltage (bipolar devices); power supply voltage (74 series digital circuits); voice carrier (VoiceControlledCarrier)
VDD: power supply voltage (unipolar devices); power supply voltage (4000 series digital circuits); drain voltage (FET)
VDD, VSS, VCC and VEE, VPP difference
Version 2:
Usually VCC and VDD power supply is, and VEE and VSS to negative, or the power supply.
VSS indicates that the connection to the scene effects tube-source (S) of power.
VDD represents a connection to the scene effects tube drain (D) of the power supply.
VEE indicates that the connection to the transistor emitter (E) the supply.
VCC represents a connection to the transistor collector (C) of the power supply.
They are named like this:
VCC and VEE, VDD, VSS is a chip, the decomposition of the power circuit, detailed rally point power polarity depends on device material. VCC generally refers to the direct connection to the integrated or decomposition circuit internal transistor C, VEE is connected to the integrated or decomposition circuit internal transistor's E-pole. Similarly, VDD, VSS is connected to an integrated internal, decomposition circuit FET of D and S. For example is using P Groove E/DMOS process of integration, then it should pick VDD power of negative and positive power VSS should receive.
Version 1:
1, the presence of effects tube (or COMS devices), VDD, VSS for drain as source, VDD and VSS refers to the symbol pin and does not represent a supply voltage.
2. some IC with VDD pin and the VCC PIN to demonstrate this device itself with voltage conversion function.
3, for digital circuits, VCC power supply voltage of the circuit, VDD is chip voltage (typically Vcc > Vdd), VSS is received.
II. Description
VSS: S = series represents the public connection, usually refers to the common grounding Terminal voltage circuits.
VCC: C = meaning of microcircuit circuit, namely, the access circuit voltage VDD: D = device represents the devices meant that the device's internal operating voltage;

What is the Difference Between Vcc, Vdd,Vss,Vee?

What is the Difference Between Vcc, Vdd,Vss,Vee?

Common supply terms has been blurred by the interchangeable application of TTL and CMOS logic families
But, the Fact is ,
Vcc and Vee are the terms used for Transistors .
Vdd and Vss are the terms used for FET’s
And in terms of supply voltages :
Vcc and Vdd is for positive supply.
Vee and Vss is for negetive supply.
Apparently this terminology originated in some way from the terminals of each type (i.e., Vcc is often applied to BJT collectors, Vee to BJT emitters, Vdd to FET drains, and Vss to FET sources). This notation then carries across to integrated circuits — TTL ICs were originally based on BJT technology, and so often use the Vcc / Vee terminology;
CMOS ICs are based on FET technology, and so often use the Vdd / Vss terminology.

What is Vcc, Vdd, Vss, Vee?

What is Vcc, Vdd, Vss, Vee?
These notations are used in describing voltages at various common power supply terminals (at these points, only a wire lead exists between the point and a power source) of a given circuit. It turns out that these common voltage terms map to transistor technology as follows:

BJT	FET	"Vxx" meaning
Vcc	Vdd	Positive supply voltage
Vee	Vss	Negative supply, ground

Apparently this terminology originated in some way from the terminals of each type of transistor, and their common connections in logic circuits (i.e., Vcc is often applied to BJT collectors, Vee to BJT emitters, Vdd to FET drains, and Vss to FET sources). This notation then carries across to integrated circuits -- TTL ICs were originally based on BJT technology, and so often use the Vcc / Vee terminology; CMOS ICs are based on FET technology, and so often use the Vdd / Vss terminology. The absolute distinctions between these common supply terms has since been blurred by the interchangeable application of TTL and CMOS logic families. Most CMOS (74HC / AC, etc.) IC data sheets now use Vcc and Gnd to designate the positive and negative supply pins.

Combinational Logic Circuits

Combinational Logic Circuits

Unlike Sequential Logic Circuits whose outputs are dependant on both their present inputs and their previous output state giving them some form of Memory, the outputs of Combinational Logic Circuits are only determined by the logical function of their current input state, logic “0” or logic “1”, at any given instant in time.

The result is that combinational logic circuits have no feedback, and any changes to the signals being applied to their inputs will immediately have an effect at the output. In other words, in a Combinational Logic Circuit, the output is dependant at all times on the combination of its inputs. So if one of its inputs condition changes state, from 0-1 or 1-0, so too will the resulting output as by default combinational logic circuits have “no memory”, “timing” or “feedback loops” within their design.

Combinational Logic

 

Combinational Logic Circuits are made up from basic logic NAND, NOR or NOT gates that are “combined” or connected together to produce more complicated switching circuits. These logic gates are the building blocks of Combinational Logic Circuits. An example of a combinational circuit is a decoder, which converts the binary code data present at its input into a number of different output lines, one at a time producing an equivalent decimal code at its output.
Combinational logic circuits can be very simple or very complicated and any combinational circuit can be implemented with only NAND and NOR gates as these are classed as “universal” gates.
The three main ways of specifying the function of a combinational logic circuit are:

• 1. Boolean Algebra – This forms the algebraic expression showing the operation of the logic circuit for each input variable either True or False that results in a logic “1” output.
• 2. Truth Table – A truth table defines the function of a logic gate by providing a concise list that shows all the output states in tabular form for each possible combination of input variable that the gate could encounter.
• 3. Logic Diagram – This is a graphical representation of a logic circuit that shows the wiring and connections of each individual logic gate, represented by a specific graphical symbol, that implements the logic circuit.

and all three of these logic circuit representations are shown below.

 

As combinational logic circuits are made up from individual logic gates only, they can also be considered as “decision making circuits” and combinational logic is about combining logic gates together to process two or more signals in order to produce at least one output signal according to the logical function of each logic gate. Common combinational circuits made up from individual logic gates that carry out a desired application include Multiplexers, De-multiplexers, Encoders, Decoders, Full and Half Adders etc.

Classification of Combinational Logic

 

One of the most common uses of combinational logic is in Multiplexer and De-multiplexer type circuits. Here, multiple inputs or outputs are connected to a common signal line and logic gates are used to decode an address to select a single data input or output switch. A multiplexer consist of two separate components, a logic decoder and some solid state switches, but before we can discuss multiplexers, decoders and de-multiplexers in more detail we first need to understand how these devices use these “solid state switches” in their design.

Solid State Switches

Standard TTL logic devices made up from Transistors can only pass signal currents in one direction only making them “uni-directional” devices and poor imitations of conventional electro-mechanical switches or relays. However, some CMOS switching devices made up from FET’s act as near perfect “bi-directional” switches making them ideal for use as solid state switches.
Solid state switches come in a variety of different types and ratings, and there are many different applications for using solid state switches. They can basically be sub-divided into 3 different main groups for switching applications and in this combinational logic section we will only look at the Analogue type of switch but the principal is the same for all types including digital.

Solid State Switch Applications

• • Analogue Switches – Used in Data Switching and Communications, Video and Audio Signal Switching, Instrumentation and Process Control Circuits …etc.
• • Digital Switches – High Speed Data Transmission, Switching and Signal Routing, Ethernet, LAN’s, USB and Serial Transmissions …etc.
• • Power Switches – Power Supplies and General “Standby Power” Switching Applications, Switching of Larger Voltages and Currents …etc.

Analogue Bilateral Switches

Analogue or “Analog” switches are those types that are used to switch data or signal currents when they are in their “ON” state and block them when they are in their “OFF” state. The rapid switching between the “ON” and the “OFF” state is usually controlled by a digital signal applied to the control gate of the switch. An ideal analogue switch has zero resistance when “ON” (or closed), and infinite resistance when “OFF” (or open) and switches with R_ON values of less than 1Ω are commonly available.

Solid State Analogue Switch

 

By connecting an N-channel MOSFET in parallel with a P-channel MOSFET allows signals to pass in either direction making it a Bi-directional switch and as to whether the N-channel or the P-channel device carries more signal current will depend upon the ratio between the input to the output voltage. The two MOSFET’s are switched “ON” or “OFF” by two internal non-inverting and inverting amplifiers.

Contact Types

Just like mechanical switches, analogue switches come in a variety of forms or contact types, depending on the number of “poles” and “throws” they offer. Thus, terms such as “SPST” (single-pole single throw) and “SPDT” (single-pole double-throw) also apply to solid state analogue switches with “make-before-break” and “break-before-make” configurations available.

Analogue Switch Types

 

Individual analogue switches can be grouped together into standard IC packages to form devices with multiple switching configurations of SPST (single-pole single-throw) and SPDT (single-pole double-throw) as well as multi channel multiplexers. The most common and simplest analogue switch in a single IC package is the 74HC4066 which has 4 independent bi-directional “ON/OFF” Switches within a single package but the most widely used variants of the CMOS analogue switch are those described as “Multi-way Bilateral Switches” otherwise known as the “Multiplexer” and “De-multiplexer” IC´s and these are discussed in the next tutorial.

Combinational Logic Summary

Then to summarise, Combinational Logic Circuits consist of inputs, two or more basic logic gates and outputs. The logic gates are combined in such a way that the output state depends entirely on the input states. Combinational logic circuits have “no memory”, “timing” or “feedback loops”, there operation is instantaneous. A combinational logic circuit performs an operation assigned logically by a Boolean expression or truth table.
Examples of common Combinational Logic Circuits include: half adders, full adders, multiplexers, demultiplexers, encoders and decoders all of which we will look at in the next few tutorials

Some Common Applications of Logic Gates

Application of OR gate

Wherever the occurrence of any one or more than one event is needed to be detected or some actions are to be taken after their occurrence, in all those cases OR gates can be used. It can be explained with an example. Suppose in an industrial plant if one or more than one parameter exceeds the safe value, some protective measure is needed to be done. In that case OR gate is used. We are going to show this with the help of a diagram.

Application of OR gate

The above figure is a typical schematic diagram where an OR gate is used to detect exceed of temperature or pressure and produce command signal for the system to take required actions.

Application of AND gate

There are mainly two applications of AND gate as Enable gate and Inhibit gate. Enable gate means allowance of data through a channel and Inhibit gate is just the reverse of that process i.e. disallowance of data through a channel. We are going to show an enabling operation to understand it in an easier way. Suppose in the measurement of frequency of a pulsed waveform. For measurement of frequency a gating pulse of known frequency is sent to enable the passage of the waveform whose frequency is to be measured. The diagram below shows the arrangement of the above explained operation.

Application of AND gate

Application of Ex-OR/Ex-NOR gate

These type of logic gates are used in generation of parity generation and checking units. The two diagrams below shows the even and odd parity generator circuits respectively for a four data.

Parity generation using Ex-OR/Ex-NOR gates

With the help of these gates parity check operation can be also performed. The diagrams below show even and odd parity check.

Parity check using Ex-OR and Ex-NOR gates

Figure (a) shows the parity check using Ex-OR gates and the figure (b) shows the parity check using Ex-NOR gates.

Application of NOT gate or Inverters

NOT gates are also known as inverter because they invert the output given to them and show the reverse result. Now the CMOS inverters are commonly used to build square wave oscillators which are used for generating clock signals. The advantage of using these is they consume low power and their interfacing is very easy compared to other logic gates.

Square wave oscillator by using a ring configuration

The above figure shows the most fundamental circuit made of ring configuration to generate square wave oscillator. The frequency of this type generator is given by

Where n represents the number of inverters and tp shows the propagation delay per gate.

Electronics Interview Questions

1. What is Electronic?
The study and use of electrical devices that operate by controlling the flow of electrons or other electrically charged particles.

2. What is communication?
Communication means transferring a signal from the transmitter which passes through a medium then the output is obtained at the receiver. (or)communication says as transferring of message from one place to another place called communication.
3. Different types of communications? Explain.
Analog and digital communication.
As a technology, analog is the process of taking an audio or video signal (the human voice) and translating it into electronic pulses. Digital on the other hand is breaking the signal into a binary format where the audio or video data is represented by a series of "1"s and "0"s.
Digital signals are immune to noise, quality of transmission and reception is good, components used in digital communication can be produced with high precision and power consumption is also very less when compared with analog signals.
4. What is sampling?
The process of obtaining a set of samples from a continuous function of time x(t) is referred to as sampling.
5. State sampling theorem.
It states that, while taking the samples of a continuous signal, it has to be taken care that the sampling rate is equal to or greater than twice the cut off frequency and the minimum sampling rate is known as the Nyquist rate.
6. What is cut-off frequency?
The frequency at which the response is -3dB with respect to the maximum response.
7. What is pass band?
Passband is the range of frequencies or wavelengths that can pass through a filter without being attenuated.
8. What is stop band?
A stopband is a band of frequencies, between specified limits, in which a circuit, such as a filter or telephone circuit, does not let signals through, or the attenuation is above the required stopband attenuation level.
9. Explain RF?
Radio frequency (RF) is a frequency or rate of oscillation within the range of about 3 Hz to 300 GHz. This range corresponds to frequency of alternating current electrical signals used to produce and detect radio waves. Since most of this range is beyond the vibration rate that most mechanical systems can respond to, RF usually refers to oscillations in electrical circuits or electromagnetic radiation.
10. What is modulation? And where it is utilized?
Modulation is the process of varying some characteristic of a periodic wave with an external signals.
Radio communication superimposes this information bearing signal onto a carrier signal.
These high frequency carrier signals can be transmitted over the air easily and are capable of travelling long distances.
The characteristics (amplitude, frequency, or phase) of the carrier signal are varied in accordance with the information bearing signal.
Modulation is utilized to send an information bearing signal over long distances.
11. What is demodulation?
Demodulation is the act of removing the modulation from an analog signal to get the original baseband signal back. Demodulating is necessary because the receiver system receives a modulated signal with specific characteristics and it needs to turn it to base-band.
12. Name the modulation techniques.
For Analog modulation--AM, SSB, FM, PM and SM
Digital modulation--OOK, FSK, ASK, Psk, QAM, MSK, CPM, PPM, TCM, OFDM
13. Explain AM and FM.
AM-Amplitude modulation is a type of modulation where the amplitude of the carrier signal is varied in accordance with the information bearing signal.
FM-Frequency modulation is a type of modulation where the frequency of the carrier signal is varied in accordance with the information bearing signal.
14. Where do we use AM and FM?
AM is used for video signals for example TV. Ranges from 535 to 1705 kHz.
FM is used for audio signals for example Radio. Ranges from 88 to 108 MHz.
15. What is a base station?
Base station is a radio receiver/transmitter that serves as the hub of the local wireless network, and may also be the gateway between a wired network and the wireless network.
16. How many satellites are required to cover the earth?
3 satellites are required to cover the entire earth, which is placed at 120 degree to each other. The life span of the satellite is about 15 years.
17. What is a repeater?
A repeater is an electronic device that receives a signal and retransmits it at a higher level and/or higher power, or onto the other side of an obstruction, so that the signal can cover longer distances without degradation.

18. What is an Amplifier?
An electronic device or electrical circuit that is used to boost (amplify) the power, voltage or current of an applied signal.
19. Example for negative feedback and positive feedback?
Example for –ve feedback is ---Amplifiers And for +ve feedback is – Oscillators
20. What is Oscillator?
An oscillator is a circuit that creates a waveform output from a direct current input. The two main types of oscillator are harmonic and relaxation. The harmonic oscillators have smooth curved waveforms, while relaxation oscillators have waveforms with sharp changes.
21. What is an Integrated Circuit?
An integrated circuit (IC), also called a microchip, is an electronic circuit etched onto a silicon chip. Their main advantages are low cost, low power, high performance, and very small size.
22. What is crosstalk?
Crosstalk is a form of interference caused by signals in nearby conductors. The most common example is hearing an unwanted conversation on the telephone. Crosstalk can also occur in radios, televisions, networking equipment, and even electric guitars.
23. What is resistor?
A resistor is a two-terminal electronic component that opposes an electric current by producing a voltage drop between its terminals in proportion to the current, that is, in accordance with Ohm's law:
V = IR.
25. What is inductor?
An inductor is a passive electrical device employed in electrical circuits for its property of inductance. An inductor can take many forms.
26. What is conductor?
A substance, body, or device that readily conducts heat, electricity, sound, etc. Copper is a good conductor of electricity.
27. What is a semi conductor?
A semiconductor is a solid material that has electrical conductivity in between that of a conductor and that of an insulator(An Insulator is a material that resists the flow of electric current. It is an object intended to support or separate electrical conductors without passing current through itself); it can vary over that wide range either permanently or dynamically.
28. What is diode?
In electronics, a diode is a two-terminal device. Diodes have two active electrodes between which the signal of interest may flow, and most are used for their unidirectional current property.
29. What is transistor?
In electronics, a transistor is a semiconductor device commonly used to amplify or switch electronic signals. The transistor is the fundamental building block of computers, and all other modern electronic devices. Some transistors are packaged individually but most are found in integrated circuits
30. What is op-amp?
An operational amplifier, often called an op-amp , is a DC-coupled high-gain electronic voltage amplifier with differential inputs[1] and, usually, a single output. Typically the output of the op-amp is controlled either by negative feedback, which largely determines the magnitude of its output voltage gain, or by positive feedback, which facilitates regenerative gain and oscillation.
31. What is a feedback?
Feedback is a process whereby some proportion of the output signal of a system is passed (fed back) to the input. This is often used to control the dynamic behaviour of the system.
32. Advantages of negative feedback over positive feedback.
Much attention has been given by researchers to negative feedback processes, because negative feedback processes lead systems towards equilibrium states. Positive feedback reinforces a given tendency of a system and can lead a system away from equilibrium states, possibly causing quite unexpected results.
33. What is Barkhausen criteria?
Barkhausen criteria, without which you will not know which conditions, are to be satisfied for oscillations.
“Oscillations will not be sustained if, at the oscillator frequency, the magnitude of the product of the
transfer gain of the amplifier and the magnitude of the feedback factor of the feedback network ( the magnitude of the loop gain ) are less than unity”.
The condition of unity loop gain -Aβ = 1 is called the Barkhausen criterion. This condition implies that
Aβ= 1and that the phase of - Aβ is zero.
34. What is CDMA, TDMA, FDMA?
Code division multiple access (CDMA) is a channel access method utilized by various radio communication technologies. CDMA employs spread-spectrum technology and a special coding scheme (where each transmitter is assigned a code) to allow multiple users to be multiplexed over the same physical channel. By contrast, time division multiple access (TDMA) divides access by time, while frequency-division multiple access (FDMA) divides it by frequency.
An analogy to the problem of multiple access is a room (channel) in which people wish to communicate with each other. To avoid confusion, people could take turns speaking (time division), speak at different pitches (frequency division), or speak in different directions (spatial division). In CDMA, they would speak different languages. People speaking the same language can understand each other, but not other people. Similarly, in radio CDMA, each group of users is given a shared code. Many codes occupy the same channel, but only users associated with a particular code can understand each other.
35. explain different types of feedback
Types of feedback:
Negative feedback: This tends to reduce output (but in amplifiers, stabilizes and linearizes operation). Negative feedback feeds part of a system's output, inverted, into the system's input; generally with the result that fluctuations are attenuated.
Positive feedback: This tends to increase output. Positive feedback, sometimes referred to as "cumulative causation", is a feedback loop system in which the system responds to perturbation (A perturbation means a system, is an alteration of function, induced by external or internal mechanisms) in the same direction as the perturbation. In contrast, a system that responds to the perturbation in the opposite direction is called a negative feedback system.
Bipolar feedback: which can either increase or decrease output.
36. What are the main divisions of power system?
The generating system,transmission system,and distribution system
37. What is Instrumentation Amplifier (IA) and what are all the advantages?
An instrumentation amplifier is a differential op-amp circuit providing high input impedances with ease of gain adjustment by varying a single resistor.
38. What is meant by impedance diagram. 
The equivalent circuit of all the components of the power system are drawn and they are interconnected is called impedance diagram.
39. What is the need for load flow study.
The load flow study of a power system is essential to decide the best operation existing system and for planning the future expansion of the system. It is also essential for designing the power system.
40. What is the need for base values? 
The components of power system may operate at different voltage and power levels. It will be convenient for analysis of power system if the voltage, power, current ratings of the components of the power system is expressed with referance to a common value called base value.

Interview & Viva questions and answers on Digital Electronics

Jan 11 • General, Placement • 2146 Views • 0 Comments

Digital electronics is that branch of science which represents signals by dicrete band of analog level. Digital electronics is also that branch of science that uses fibre optics to detect digital display. Most of the reputed electronics companies put up their questions from this portion of electronics. So to assist the aspirants, we are providing here some frequently asked interview questions and answers on digital electronics

DIGITAL ELECTRONICS

Ques 1. Explain about setup time and hold time, what will happen if there is setup time and hold tine violation, how to overcome this?
Ans. For Synchronous flip-flops, we have special requirements for the inputs with respect to clock signal input there are Setup Time: Minimum time Period during which data must be stable before the clock makes a valid transition. E.g. for a positive edge triggered flip-flop having a setup time of 2ns so input data should be Stable for 2ns before the clock makes a  valid transaction from zero to one.
Hold Time: Minimum time period during which data must be stable after the clock has made a valid transition. E.g. for a posedge triggered flip-flop, with a hold time of 1 ns. Input Data (i.e. R and S in the case of RS flip-flop) should be stable for at least 1 ns after clock has made transition from 0 to 1 Hold time is the amount of time after the clock edge that same input signal has to be held before changing it to make sure it is sensed properly at the clock edge. Whenever there are setup and hold time violations in any flip-flop, it enters a state where its output is unpredictable: this state is known as metastable state (quasi stable state); at the end of metastable state, the flip-flop settles down to either ’1′ or ’0′. This whole process is known as metastability

Ques 2.  What is difference between latch and flip-flop?
Ans. The main difference between latch and FF is that latches are level sensitive while FF is edge sensitive. They both require the use of clock signal and are used in sequential logic. For a latch, the output tracks the input when the clock signal is high, so as long as the clock is logic 1, the output can change if the input also changes. FF on the other hand, will store the input only
when there is a rising/falling edge of the clock. Latch is sensitive to glitches on enable pin, whereas flip-flop is immune to glitches. Latches take fewer gates (also less power) to implement than flip-flops. Latches are faster than flip-flops.

Ques 3  Given only two xor gates one must function as buffer and another as inverter? 
Ans Tie one of xor gates input to 1 it will act as inverter. Tie one of xor gates input to 0 it will act as buffer.

Ques 4 Difference between Mealy and Moore state machine?
Ans Mealy and Moore models are the basic models of state machines. A state machine which uses only Entry Actions, so that its output depends on the state, is called a Moore model. A state machine which uses only Input Actions, so that the output depends on the state and also on inputs, is called a Mealy model. The models selected will influence a design but there are no general indications as to which model is better. Choice of a model depends on the application, execution means (for instance, hardware systems are usually best realized as Moore models) and personal preferences of a designer or programmer. Mealy machine has outputs that depend on the state and input (thus, the FSM has the output written on edges) Moore machine has outputs that depend on state only (thus, the FSM has the output written in the state itself.

Advantages and Disadvantages
In Mealy as the output variable is a function both input and state, changes of state of the state variables will be delayed with respect to changes of signal level in the input variables, there are possibilities of glitches appearing in the output variables. Moore overcomes glitches as output dependent on only states and not the input signal level. All of the concepts can be applied to Moore-model state machines because any Moore state machine can be implemented as
a Mealy state machine, although the converse is not true. Moore machine: the outputs are properties of states themselves… which means that you get the output after the machine
reaches a particular state, or to get some output your machine has to be taken to a state which provides you the output. The outputs are held until you go to some other state Mealy machine:
Mealy machines give you outputs instantly, that is immediately upon receiving input, but the output is not held after that clock cycle.

Ques 5  Difference between one hot and binary encoding?
Ans. Common classifications used to describe the state encoding of an FSM are Binary (or highly encoded) and One hot.A binary-encoded FSM design only requires as many flip-flops as are needed to uniquely encode the number of states in the state machine. The actual number of flip-flops required is equal to the ceiling of the log-base-2 of the number of states in the FSM.A one hot FSM design requires a flip-flop for each state in the design and only one flip-flop (the flip-flop
representing the current or “hot” state) is set at a time in a one hot FSM design. For a state machine with 9- 16 states, a binary FSM only requires 4 flip-flops while a one hot FSM requires a flip-flop for each state in the design FPGA vendors frequently recommend using a one hot state encoding style because flip-flops are plentiful in an FPGA and the combinational logic required to implement a one hot FSM design is typically smaller than most binary encoding styles.
Since FPGA performance is typically related to the combinational logic size of the FPGA design, one hot FSMs typically run faster than a binary encoded FSM with larger combinational logic blocks

Ques 6 How to achieve 180 degree exact phase shift?
Ans.
a) DCM an inbuilt resource in most of FPGA can be configured to get 180 degree phase shift.
b) BUFGDS that is differential signaling buffers which are also inbuilt resource of most of FPGA can be used. Digital Electronics Solved Questions

Ques 7 What is significance of RAS and CAS in SDRAM?
Ans. SDRAM receives its address command in two address words. It uses a multiplex scheme to save input pins. The first address word is latched into the DRAM chip with the row address strobe (RAS). Following the RAS command is the column address strobe (CAS) for latching the second address word. Shortly after the RAS and CAS strobes, the stored data is valid for reading.

Ques 8 Tell some of applications of buffer?
Ans. a) They are used to introduce small delays.
b) They are used to eliminate cross talk caused due to inter electrode capacitance due to close routing.
c) They are used to support high fan-out, e.g.: bufg
9) Give two ways of converting a two input NAND gate to an inverter?
a) Short the 2 inputs of the NAND gate and apply the single input to it.
b) Connect the output to one of the input and the other to the input signal.

Ques 10.  Why is most interrupts active low?
Ans. This answers why most signals are active low if you consider the transistor level of a module, active low means the capacitor in the output terminal gets charged or discharged based on low to high and high to low transition respectively. When it goes from high to low it depends on the
pull down resistor that pulls it down and it is relatively easy for the output capacitance to discharge rather than charging. Hence people prefer using active low signals.

We hope that the given set of questions and answers on digital electronics satisfies your needs and so we would like to have some feedback from your part so as to improve it. Please put your valuable feedback in the comment the box.

Electronics interview questions and answers

1. What is a p-n junction diode? State and explain some of its applications. - Electronics

2.What is a transistor? What are its applications? - Electronics

3.What is Band Gap Theory? - Electronics

4.What do you understand by LEDs? How do they work? - Electronics

5.What is the construction of a Solar Cell? How is EMF generated? - Electronics

6.What is a Stage? Explain its functioning. - Electronics

7.Briefly explain the construction and application of a JFET. - Electronics

8.Explain Capacitance, Inductance, Resistance. - Electronics

9.What’s a microprocessor? - Electronics

10.What are Encoders and Decoders? - Electronics

11.What is the difference between LED and LCD? - Electronics

12.Explain the construction and pros of using plasma screens. - Electronics

13.What is Power Electronics?

14.How do touch screens work? - Electronics

15.What is a BJT? What are its advantages and disadvantages? - Electronics

16.What is a rectifier, what are its various types?- Electronics

17.What is a Zener diode? - Electronics

18.Discuss the role of Electronics in the medical world.

19.What are Laser Diodes? - Electronics

20.Explain digital circuits and the various components used in creating them? - Electronics

1. What are electronic devices and components?
2. What is an analogue circuit? Explain with an example.
3. What are digital circuits?
4. What are the building blocks of a digital circuit?
5. What are integrated devices?
6. What is noise in reference to electronic circuits?
7. State Faraday`s law of induction.
8. What is the Gauss`s law?
9. State the Kirchoff`s laws.
10. Explain in detail Norton`s theorem.
11. Explain in detail the Thevenin`s theorem
12. What is voltage drop?
13. What is a resistor?
14. What is an inductor?
15. What are the different construction techniques in electronics?
16. What is a flip-flop?
17. What are the different types of flip-flops?
18. Explain how to convert a
19. State the differences between a flip-flop and a latch?
20. What does a tristate signal in electronics signify?
21. With the help of diagram explain a CMOS inverter.
22. What is a diode in reference to electronics?
23. What is an amplifier?
24. State the differences between power amplifier and voltage amplifier.
25. What is conductance? How is it measured?
26. What are RLC circuits?
27. What are FET`s?
28. What are the various logic gates?
29. Which semiconductor device is used as a voltage regulator and why?
30. What is the zener breakdown?
31. What is avalance breakdown?
32. Describe the sampling theorem.
33. What is an idea current source?
34. What are filters?
35. What are the different types of filters?
36. Explain the working of FIR filters?
37. State the differences between FIR and IIR filters?
38. What are chebushev filters? Explain?
39. What is modulation? Explain in detail.
40. Explain the working of a multiplexer.
41. How can the race-around problem be solved?
42. What is CMR?
43. What is ASCII in reference to electronics?
44. What is an EEPROM?
45. What is a waveform used for in reference to electronics?
46. Explain with the help of a diagram the functioning of an adder.
47. What were vacuum tubes used for?
48. What are schmitt triggers?
49. What is a DSP?
50. Explain what is an ASIC?
51. Explain what is an FPGA?
52. How is thermal management done in electronic circuitry?
53. How is CAD used with electronics? Give example.

 

Digital Electronics Interview Questions

1. Explain the difference between FIFO and RAM
2. How to execute a full subtractor from a full adder?
3. Define multiplexer
4. Explain the difference between D flip-flop and a D latch?
5. Explain two ways to convert a 2 input NAND gate an inverter?
6. What happens when contents of a register are shifted left to right?
7. How to implement an AND gate by using MUX?
8. Name some of the applications of a buffer
9. What is importance of cas and ras in SDRAM?
10. Can you achieve 180 degree exact phase shift? How?
11. How to determine longest path?
12. How to determine maximum operating frequency?
13. Explain the difference between one-hot and binary encoding?
14. Explain the difference between moore and mealy state machines?
15. How to develop a 4:1 MUX by using 2:1 MUX?
16. Name two XOR gates among which one can function as buffer and the other as inverter?
17. What is meant by waveform, and how to overcome it?
18. Define is meant by glitch?
19. Define slack
20. Define skew. What are the issues associated with skew, and how to overcome them?
21. What is meant by setup time and hold time? What happens when the setup and hold time violation occur? How to overcome it?
22. Why do we call an excess-4 code as unweighted code?
23. Define BCD. Explain its advantages and disadvantages.
24. How to design gray to binary code converter?
25. How to recognize the number of states that the ripple counter has, just by looking at the figure even though it may have some invalid states?
26. Explain the purpose of the package that is present around a microprocessor silicon die
27. Explain the main difference between 8086 and 8085?
28. Explain the difference between a flip-flop and a latch?
29. What are the frequency bands that you can use in satellite communication?
30. Explain the benefits of using C band for satellite communication
31. How to develop CMOS inverter?
32. Explain ASCII
33. What is EBCDIC?
34. What is meant by 3db cutoff frequency? Why is it called so?
35. What is de-emphasis and pre-emphasis?
36. Why BFSK is less efficient when compared to BPFSK?
37. Why do you use VSB-C3F (vestigial side band) transmission for picture?
38. What is the type of modulation that is used in Television transmission?
39. What is the necessity of modulation?
40. What is the signals range that you can use for terrestrial transmission?
41. What is full-duplex communication? And what is half-duplex communication?
42. Define CMRR
43. What are the pros and cons of FIR filters than IIR counterparts?
44. Define response
45. Define sampling theorem
46. Why is it necessary to filter actual response and ideal response of filters?
47. What are the types of filters?
48. What is zener breakdown?
49. What is avalanche breakdown?
50. What is an ideal voltage source?
51. Which semiconductor device that you can use as a voltage regulator? Why?
52. Define race-around problem
53. How to convert a JK Flip-flop to a D Flip-flop?
54. How to convert an SR Flip-flop to a JK Flip-flop?
55. Define multiplexer?
56. Explain the difference between Flip flops and Latches?
57. What is D-FF?

Digital Electronics Interview Questions Fully Solved-1

Digital Electronics Interview Questions Fully Solved-1

Question 1

Determine the output frequency for a frequency division circuit that contains 12 flip-flops with an input clock frequency of 20.48 MHz.

A	10.24 kHz
B	5 kHz
C	30.24 kHz
D	15 kHz
Question 2

Which statement BEST describes the operation of a negative-edge-triggered D flip-flop?

A	The logic level at the D input is transferred to Q on NGT of CLK.
B	The Q output is ALWAYS identical to the CLK input if the D input is HIGH.
C	The Q output is ALWAYS identical to the D input when CLK = PGT.
D	The Q output is ALWAYS identical to the D input.

Question 3

Propagation delay time, tPLH, is measured from the ________.

A	triggering edge of the clock pulse to the LOW-to-HIGH transition of the output
B	triggering edge of the clock pulse to the HIGH-to-LOW transition of the output
C	preset input to the LOW-to-HIGH transition of the output
D	clear input to the HIGH-to-LOW transition of the output
Question 4

How is a J-K flip-flop made to toggle?

A	J = 0, K = 0
B	J = 1, K = 0
C	J = 0, K = 1
D	J = 1, K = 1

Question 5

How many flip-flops are in the 7475 IC?

A	1
B	2
C	4
D	8
Question 6

How many flip-flops are required to produce a divide-by-128 device?

A	1
B	4
C	6
D	7

Question 7

Which is not an Altera primitive port identifier?

A	clk
B	ena
C	clr
D	prn
Question 8

The timing network that sets the output frequency of a 555 astable circuit contains ________.

A	three external resistors are used
B	two external resistors and an external capacitor are used
C	an external resistor and two external capacitors are used
D	no external resistor or capacitor is required

Question 9

What is the difference between the enable input of the 7475 and the clock input of the 7474?

A	The 7475 is edge-triggered.
B	The 7474 is edge-triggered.
Question 10

	The phenomenon of interpreting unwanted signals on J and K while Cp (clock pulse) is HIGH is called ________.
A	parity error checking
B	ones catching
C	digital discrimination
D	digital filtering

Question 11

What is another name for a one-shot?

A	Monostabl
B	Multivibrator
C	Bistable
D	Astable
Question 12

On a master-slave flip-flop, when is the master enabled?

A	when the gate is LOW
B	when the gate is HIGH
C	both of the above
D	neither of the above

Question 13

One example of the use of an S-R flip-flop is as a(n):

A	racer
B	astable oscillator
C	binary storage register
D	transition pulse generator
Question 14

What is the difference between the 7476 and the 74LS76?

A	the 7476 is master-slave, the 74LS76 is master-slave
B	the 7476 is edge-triggered, the 74LS76 is edge-triggered
C	the 7476 is edge-triggered, the 74LS76 is master-slave
D	the 7476 is master-slave, the 74LS76 is edge-triggered

Question 15

Which of the following is correct for a gated D flip-flop?

A	The output toggles if one of the inputs is held HIGH
B	Only one of the inputs can be HIGH at a time.
C	The output complement follows the input when enabled.
D	Q output follows the input D when the enable is HIGH.
Question 16

With regard to a D latch, ________.

A	the Q output follows the D input when EN is LOW
B	the Q output is opposite the D input when EN is LOW
C	the Q output follows the D input when EN is HIGH
D	the Q output is HIGH regardless of EN's input state

Question 17

How can the cross-coupled NAND flip-flop be made to have active-HIGH S-R inputs?

A	It can't be done.
B	Invert the Q outputs.
C	Invert the S-R inputs.
Question 18

When is a flip-flop said to be transparent?

A	when the Q output is opposite the input
B	when the Q output follows the input
C	when you can see through the IC packaging

Question 19

Four positive edge-triggered D flip-flops are used to store a 4-bit binary number as shown below. Determine if the circuit is functioning properly, and if not, what might be wrong.

• 

A	The circuit is functioning properly.
B	Q2 is incorrect; the flip-flop is probably bad.
C	The input to flip-flop 3 (D2) is probably wrong; check the source of D2.
D	A bad connection probably exists between FF-3 and FF-4, causing FF-3 not to reset.
Question 20

A 555 operating as a monostable multivibrator has an R1 of 1 M. Determine C1 for a pulse width of 2 s.

A	1.8 F
B	18 F
C	18 pF
D	18 nF

Question 21

Master-slave J-K flip-flops are called pulse-triggered or level-triggered devices because input data is read during the entire time the clock pulse is at a LOW level.

A	True
B	False
Question 22

Which of the following is correct for a D latch?

A	The output toggles if one of the inputs is held HIGH.
B	Q output follows the input D when the enable is HIGH.
C	Only one of the inputs can be HIGH at a time.
D	The output complement follows the input when enabled.

Question 23

A J-K flip-flop is in a "no change" condition when ________.

A	J = 1, K = 1
B	J = 1, K = 0
C	J = 0, K = 1
D	J = 0, K = 0
Question 24

A correct output is achieved from a master-slave J-K flip-flop only if its inputs are stable while the:

A	clock is LOW
B	slave is transferring
C	flip-flop is reset
D	clock is HIGH

Question 25

Which of the following describes the operation of a positive edge-triggered D flip-flop?

A	If both inputs are HIGH, the output will toggle.
B	The output will follow the input on the leading edge of the clock.
C	When both inputs are LOW, an invalid state exists.
D	The input is toggled into the flip-flop on the leading edge of the clock and is passed to the output on the trailing edge of the clock.
Question 26

What does the triangle on the clock input of a J-K flip-flop mean?

A	level enabled
B	edge-triggered

Question 27

A J-K flip-flop with J = 1 and K = 1 has a 20 kHz clock input. The Q output is ________.

A	constantly LOW
B	constantly HIGH
C	a 20 kHz square wave
D	a 10 kHz square wave
Question 28

The toggle condition in a master-slave J-K flip-flop means that Q and will switch to their ________ state(s) at the ________.

A	opposite, active clock edge
B	inverted, positive clock edge
C	quiescent, negative clock edge
D	reset, synchronous clock edge

Question 29

An RC circuit used in a nonretriggerable 74121 one-shot has an REXT of 49 k and a CEXT of 0.2 F. The pulse width (tW) is approximately ________.

A	6.9 s
B	6.9 ms
C	69 ms
D	690 ms
Question 30

On a positive edge-triggered S-R flip-flop, the outputs reflect the input condition when ________.

A	the clock pulse is LOW
B	the clock pulse is HIGH
C	the clock pulse transitions from LOW to HIGH
D	the clock pulse transitions from HIGH to LOW

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